Philippe Lorenzini

Professeur des universités

930 Chemin des Colles
Parc de Sophia Antipolis
F-06410 Biot
France

Téléphone : +33 (0)4 92 38 85 66
Fax : +33 (0)4 92 38 85 01
Mail : Philippe.Lorenzini@unice.fr
Résumé :
Philippe Lorenzini a obtenu son doctorat en sciences physiques au GES-CNRS de l'Université Montpellier 2, France, en 1992. En 1993, il a rejoint l'école d'ingénieurs Polytech Nice-Sophia (Université Nice Sophia Antipolis), où il est devenu professeur en 2005. En 2011, il intègre le laboratoire EpOC (URE UNS 006), devenu Polytech'Lab en 2017. Ses travaux de recherche concernent la physique des semiconducteurs et la conception de circuits et systèmes analogiques-RF.

Philippe Lorenzini received the Ph.D. degree from GES-CNRS, at the University of Montpellier 2, France, in 1992. In 1993, he joined the engineering school Polytech Nice-Sophia (Nice Sophia Antipolis University) where he is full professor in 2005. In 2011, he joined EpOC Laboratory (URE UNS 006), which became Polytech'Lab in 2017. His research focuses on semiconductor physics and analog and RF circuit design.

Domaine d'activité :

Physique des semiconducteurs, mémoire non-volatile, capteurs et électronique assciée

Publications :

Revues internationales :

P. Devoge, H. Aziza, P. Lorenzini, P. Masson, F. Julien, A. Marzaki, A. Malherbe, J. Delalleau, T. Cabout, A. Regnier & S. Niel, “Hot-carrier reliability and performance study of a variable gate-to-drain/source overlap transistor”, Microelectronic Reliability, vol. 139, 6 p., 2022.

Z. Wei, G. Jacquemod, P. Lorenzini,  F. Hameau, E. de Foucauld & Y. Leduc, “Study and reduction of vairability in 28nm Fully Depleted Silicon On Insulator technology”, Journal of Low Power Electronics, vol. 12, n° 1, p. 64-73, 2016.

C. Jacquemod, K. Nguyen Trung, K. Sevin, E. Dekneuvel, K. Aguir, B. Nicolle, P. Lorenzini & G. Jacquemod, “Low cost wireless current sensor for NIALM application”, Sensors & Actuators, vol. 252, pp. 209-224, 2016.

G. Jacquemod, A. Fonseca, E. de Foucauld, Y. Leduc & P. Lorenzini, “2.45 GHz 0.8 mW voltage-controlled ring oscillator (VCRO) in 28 nm Fully Depleted Silicon On Insulator (FDSOI) Technology”, Frontiers of Materials Science, vol. 9, Issue 2, p. 156-162, 2015.

A. Fonseca, E. de Foucauld, P. Lorenzini & G. Jacquemod, «Low power 28nm FDSOI 2.45 GHz PLL», Journal of Low Power Electronics, vol. 10, n° 1, p. 149-162, 2014.

F. Duhem, N. Marques, F. Muller, H. Rabah, S. Weber & P. Lorenzini, “Dynamically reconfigurable entropy coder for multi-standrad video adaptation using FaRM”, Microprocessors and Microsystems, vol. 37, pp. 1-8, 2013.

F. Duhem, F. Muller & P. Lorenzini, “Reconfiguration time overhead on Field Programmable Gate arrays: Reduction and cost model”, IET Comput. Digital Tech, vol. 6, n°2, pp. 105-113, 2012.

P. Mazoyer, S. Puget, G. Bossu, P. Masson, P. Lorenzini & J.M. Portal, “Thin film embedded memory solution”, Current Applied Physics, vol. 10, n°1, pp. e9-e12, 2010.

S. Puget, G. Bossu, P. Masson, P. Mazoyer, R. Ranica, A. Villaret, P. Lorenzini, J.M. Portal, G. Ghibaudo, R. Bouchakour, G. Jacquemod & T. Skotnicki, “Modelling the Independent Double Gate Transistor in Accumulation Regime for 1T DRAM Application”, IEEE Trans. On Electron. Devices, vol. 57, n°4, pp. 855-865, 2010.

Y. Cordier, F. Semond, J. Massies, M. Leroux, P. Lorenzini & C. Chaix, “Developments for the production of high quality and high uniformity AlGaN/GaN heterostructures by ammonia MBE”, Journal of Crystal Growth, 301-302, pp. 434-436, 2007.

R. Tauk, J. Lusakowski, W. Knap, A. Tiberj, Z. Bougrioua, M. Azize, P. Lorenzini, M. Sakowicz, K. Karpierz, C. Fenouillet-Beranger, M. Casse, C. Gallon, F. Boeuf & T. Skotnicki, “Low electron mobility of field-effect transistor determined by modulated magnetoresistance”, Journal of applied physics, vol. 102, 2007.


Revues nationales :

G. Jacquemod, Y. Charlon, Z. Wei, Y. Leduc & P. Lorenzini, “Application de la technologie FDSOI pour la conception de nouvelles topologies de circuits analogiques et mixtes”, J3eA, Hors-série 1 (2019), vol. 18, 1021, 9 pages, Octobre 2019.


Conférences "Invité" :

 

Y. Leduc, G. Jacquemod, Z. Wei, J. Modad, P. Lorenzini & E. de Foucauld, “La logique complémentaire, une opportunité offerte par le FDSOI pour l'intégration de circuits mixtes dans les technologies les plus avancées”, FETCH, Villard-de-Lans, France, 2016.

G. Jacquemod, E. de Foucauld, Y. Leduc, F. Hameau, Z. Wei, J. Modad & P. Lorenzini, “VCRO design in 28 nm FDSOI technology using fully complementary inverters”, ICSS, Phuket, Thailland, pp. 63-64, 2015.

C. Jacquemod, C. Meyer, K. Sevin, L. Hebrard, K. Aguir, B. Nicolle, P. Lorenzini & G. Jacquemod, “Design and characterization of miniaturied remote current sensors”, ICSS, Phuket, Thailland, pp. 78-79, 2015.

Y. Leduc, Z. Wei, J. Modad, M.A. Garcia-Perez, E. de Foucauld, P. Lorenzini & G. Jacquemod, “Digital complementary logic in 28 nm FDSOI technology to address the next nanoelectronic challenges”, BIT'S 5th Annual World Congress of Nano Science & Technology, Xi'an, China, pp. 172, 2015.

G. Jacquemod, Y. Leduc, P. Lorenzini, E. de Foucauld & A. Fonseca, “Self-calibration of analog and mixed cells using back-gate auto-biasing  transistor in 28 nm FDSOI technology and beyond”, Nanotechnology and Materials Science, Dubai, UAE, pp. 97, 2015.

G. Jacquemod, A. Fonseca, E. de Foucauld, Y. Leduc, & P. Lorenzini, “2.45 GHz 0.8 mW VCRO in FDSOI 28 nm technology”, ICSS, Hong Kong, China, pp. 74-75, 2014.

A. Fonseca, G. Jacquemod, Y. Leduc, E. de Foucauld & P. Lorenzini, “VCO Design in SOI technologies”, NEWCAS, Special Session «Frequency synthesis – New designs, new technologies», Trois Rivières, Canada, 2014.

G. Jacquemod, A. Fonseca, Y. Leduc, E. de Foucauld & P. Lorenzini, “Analog Design in FDSOI 28 nm technology and beyond”, CISIS, 3rd Annual World Congress of Emerging InfoTech, Dalian, China, 2014.

A. Fonseca, E. de Foucauld, P. Lorenzini & G. Jacquemod, “CMOS technology beyond 22 nm”, ICSS, Las Vegas, USA, pp. 152-153, 2013.

C. Jacquemod, A. Chargui, K. Aguir, B. Nicolle & P. Lorenzini, “Miniaturized current sensor for smart building application”, ICSS, Las Vegas, USA, pp. 29-30, 2013.

 

Conférences internationales :
 

P. Devoge, H. Aziza, P. Lorenzini, P. Masson, F. Julien, A. Marzaki, A. Malherbe, J. Delalleau, T. Cabout, A. Regnier & S. Niel, “Schmitt trigger to benchmark the performance of a new zero-cost transistor”, ICECS, Glasgow, UK, 2022.

P. Devoge, H. Aziza, P. Lorenzini, P. Masson, F. Julien, A. Marzaki, A. Malherbe, J. Delalleau, T. Cabout, A. Regnier & S. Niel, “Hot-carrier reliability and performance study of a variable gate-to-drain/source overlap transistor”, ESREF, Berlin, Germany, 2022.

P. Devoge, H. Aziza, P. Lorenzini, A. Malherbe, F. Julien, A. Marzaki, A. Regnier & S. Niel, “Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor”, ISCAS, Austin, USA, 2022.

P. Devoge, H. Aziza, P. Lorenzini, P. Masson, F. Julien, A. Marzaki, A. Malherbe, J. Delalleau,  T. Cabout, A. Regnier & S. Niel, “Gate-to-drain/source overlap and asymmetry effects on hot-carrier generation”, IEEE IIRW, Fallen Leaf Lake, USA, 2022.

P. Devoge, H. Aziza, P. Lorenzini, F. Julien, A. Mazarki, A. Malherbe, M. Mantelli, T. Sardin, S. Haendler, A. Reigner & S. Niel, "Circuit-level evaluation of a new zero-cost transistor in a embedded non-volatile memory CMOS technology", DTIS, Apulia, Italia, 2021.

P. Devoge, H. Aziza, P. Lorenzini, A. Mazarki, A. Malherbe, M. Mantelli, A. Reigner & F. Julien, "Hot-carrier evaluation of a zero-cost transistor developed via process optimization in an embedded non-volatile memory CMOS technology", ESREF, Bordeaux, France, 2021.

D. Morillon, P. Masson, F. Julien, P. Lorenzini, J. Goy, C. Pribat, O. Gourhant, T. Kempf, J.-L. Ogier, A. Villaret, G. Ghezzi, N. Cherault & S. Niel, “Gate Oxide Degradation Assessment by Electrical Stress and Capacitance Measurements,” International Integrated Reliability Workshop, Fallen Leaf Lake, CA, USA, 2018.

G. Jacquemod, Z. Wei, P. Lorenzini & Y. Leduc, “New Design using UTBB FDSOI technology”, CDNLive, Munich, Germany, 2016.

G. Jacquemod, Z. Wei, J. Modad, E. de Foucauld, F. Hameau, Y. Leduc & P. Lorenzini, “Study and reduction of variability in 28nm FDSOI technology”, VARI/PATMOS, Salvador Bahia, Brazil, p. 19-22, 2015.

C. Jacquemod, K. Aguir, B. Nicolle, P. Lorenzini & G. Jacquemod, “Innovating current sensor for NILM application”, NILM Workshop, Austin, USA, June 2014.